Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/3891
Title: IDDQ testing for deep sub-micron SOC
Authors: Ye, Xiaocheng.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
Issue Date: 2005
Abstract: The focus of this project is to study the application of new IDDQ testing schemes to deep-submicron SoC (System on Chip), for example, a 32-bit DSP microcontroller. Power partitioning has been applied to reduce the circuit scale under test from design point of view.
URI: http://hdl.handle.net/10356/3891
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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