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https://hdl.handle.net/10356/39143
Title: | Development and optimization of 1.2 micron CMOS process technology | Authors: | Arati Majumder | Keywords: | DRNTU::Engineering::Electrical and electronic engineering | Issue Date: | 2007 | Abstract: | This project was aimed to study and optimize the baseline 1.2um Twin-Well CMOS technology, keeping in view the future application of this process to the 1.2um SiGe BiCMOS technology. | Description: | 152 p. | URI: | http://hdl.handle.net/10356/39143 | Schools: | School of Electrical and Electronic Engineering | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Theses |
Files in This Item:
File | Description | Size | Format | |
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AratiMajumder2007.pdf Restricted Access | Main report | 18.35 MB | Adobe PDF | View/Open |
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