Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/39146
Title: Study of digital breakdown in pMOSFETs with ultrathin gate dielectric and its significance to reliability assessment
Authors: Ashwin Srinivas.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2007
Abstract: The purpose of this project is to study the gate oxide breakdown in ultra-thin pMOSFETs using current-limited multiple cycle constant voltage stress tests. Samples of various dimensions are to be subjected to low voltage stresses in inversion mode and the gradual degradation of the device characteristics recorded. The evolution of the gate current, under the phenomenon of progressive breakdown, provides an insight into the evolution of the conductor-like percolation path within the oxide layer.
Description: 90 p.
URI: http://hdl.handle.net/10356/39146
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
EEE_THESES_NEW_65.pdf
  Restricted Access
9.83 MBAdobe PDFView/Open

Page view(s)

221
Updated on Jun 18, 2021

Download(s)

2
Updated on Jun 18, 2021

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.