Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/39148
Title: Modeling, synthesis and test logic insertion for DLX CPU
Authors: Bandlamudi Kirankumar
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
Issue Date: 2007
Abstract: Mixed signal integrated circuits have become common in recent years. In these designs, some circuits are digital functional blocks while others are analog modules. Data processors are one of the widely used modules in present day communication chips and also in DSP designs. Many times, these modules are given by external vendors as IPs. Control circuits are normally designed to control the interface of the digital and analog modules and to configure the internal settings of the chip. Also, the test cost is steadily increasing, since high end test systems are required due to the complexity of the chip and the higher data rates. It is a good idea to have some simple data processing circuits that can do the job of data processing and control the internal resources and operations of integrated circuit with firmware.
Description: 121 p.
URI: http://hdl.handle.net/10356/39148
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
BandlamudiKirankumar2007.pdf
  Restricted Access
Main report10.53 MBAdobe PDFView/Open

Page view(s)

223
Updated on Jun 23, 2021

Download(s)

4
Updated on Jun 23, 2021

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.