Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/39173
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dc.contributor.authorChua, Joo Ming.en_US
dc.date.accessioned2010-05-21T04:47:13Z-
dc.date.available2010-05-21T04:47:13Z-
dc.date.copyright2006en_US
dc.date.issued2006-
dc.identifier.urihttp://hdl.handle.net/10356/39173-
dc.description74 p.en_US
dc.description.abstractThe design and implementation of a CMOS Low-Voltage Differential Signaling (LVDS) driver and receiver pair is described in this report. By using differential technique and low voltage swing, LVDS can achieve high transmission speeds and low power consumption at the same time. In the proposed design, the required tolerance on the dc output levels was achieved over process, temperature, and supply voltage variations with neither external components nor trimming procedure, by means of a closed-loop control circuit and an internal voltage reference.en_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuitsen_us
dc.titleDesign of a CMOS LVDS driver and receiver pairen_US
dc.typeThesisen_US
dc.contributor.supervisorNg Lian Soonen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.description.degreeMaster of Science (Integrated Circuit Design)en_US
item.grantfulltextrestricted-
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Appears in Collections:EEE Theses
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