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|Title:||PCB layout design consideration for high speed digital application||Authors:||Ang, See Theng||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits||Issue Date:||2010||Abstract:||As technology advanced, operation speed of the systems increases, edge rate of the signals has entered the sub-nanoseconds region. The conversion rate of the ADC is also increasing with the trend. Being one of the critical components bridging the real world analog signal and the digital signal, it is therefore important to study the design consideration particularly the PCB layout design techniques so as to ensure signal integrity and optimized circuit overall performance. A literature review is done to understand high speed ADC which includes the different ADC architectures, critical specification parameters to quantify the performance of the ADC. Hands on understanding of a typical operational highspeed ADC prototype was carried out to understand its operation while observing the critical layout design technique utilized such as termination, crosstalk, vias, trace bends and trace delay design for high speed ADC circuitry but not only limited to ADC. From my project, simulation results shows that in PCB design layout for high speed digital system, it is important to minimize signal trace impedance variations by employing microstrip line configuration, minimum via diameter and trace terminations. Crosstalk can be minimized by 50% with double the trace separation between the adjacent signal traces. And optimized signal delay with optimum impedance variation and emissions radiated using serpentine delay of 45-degree bends, segment spacing of three to five times the distance of the signal trace from the reference plane and with cluster of five bends or less.||URI:||http://hdl.handle.net/10356/40310||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Student Reports (FYP/IA/PA/PI)|
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