Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/40504
Title: Design of a linear low drop out (LDO) voltage regulator
Authors: Lawrence, Jennifer.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2010
Abstract: The drastic increase in the use of battery powered portable devices has required electronic devices to be able to work in low voltage environment. Power management systems are then becoming more crucial in those devices. These power management systems usually contain several low dropout voltage regulators (LDO). In order to fulfil the requirements of the low voltage portable electronic devices, a low voltage, low power LDO was designed in the final year project. However, the issues of the precision of output voltage and transient response tradeoffs with the LDO stability need to be taken care of. The designed LDO works well in the 1.2V supply voltage and produces a stable 0.9V output voltage. An Adaptive Miller Compensation (AMC) technique has been implemented in the LDO design to achieve high stability as well as fast line and load transient responses. Additional external capacitor of 2.2µF and ESR of 50mΩ were also used in the design. The performance of the LDO was verified in Cadence. The settling time of this LDO is less than 5µs and the peak voltage variation is within ±1% of the stable output voltage. Furthermore, simulations with different corner models and temperatures at various load conditions had been performed to verify the LDO stability. From the simulation results, the LDO showed high stability with phase margin > 60 degree at every case. Moreover, the load and line regulation also met the design specifications.
URI: http://hdl.handle.net/10356/40504
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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