A 12-bit ultra-low power analog to digital converter design for an infrared imaging system

Abstract

This project pertains to the design a 12-bit ultra-low power analog-to-digital converter (ADC). This ADC design is part of an on-going NTU research project collaborated with MIT, and this collaborative project is the development of a Multispectral Infrared Detector Arrays on Read-Out Integrated Circuit (MIDAS-on-ROIC). The ultra-low power attribute is imperative for this ADC design for a couple reasons. First, the MIDAS-on-ROIC system requires low-power operation for its high sensitivities. Second, the ADC usually dissipates significant amount of power in infrared systems. On the basis of Successive Approximation Register (SAR) approach, the designed ADC achieves 12-bit resolution at sampling rate of 20 ksps and dissipates merely 16.6μW with 3.3 V power supply. The designed ADC is expected to operate in -40 0C or lower temperature environment. The designed SAR ADC comprises a comparator, a Digital-to-Analog Convertor (DAC) and a successive approximation register. A unique dynamic comparator is realized with zero static current, resulting in very low power dissipation at the comparator. A hybrid architecture comprising both a resistor string and a capacitor array is realized for the DAC for both high precision and low power dissipation. The successive approximation register is also designed with several low power design techniques. Some of special techniques are also realized to minimize the digital noise in the circuits including the realization of a clock delay for dynamic comparator and the optimization of transistor sizes. This 12-bit ADC design is realized on the bias of 0.35μm AMS process. The schematic of the ADC is simulated, the layout of the ADC is also implemented, and the post-layout simulation is partially completed. The ADC design is expected to be fabricated in May 2010. A conference paper arising from this final year project is being submitted.