Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/41403
Title: Novel transistor structures for future deep submicron MOS applications
Authors: Theng, Ah Leong
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2008
Source: Theng, A. L. (2008). Novel transistor structures for future deep submicron MOS applications. Master’s thesis, Nanyang Technological University, Singapore.
Abstract: Bulk silicon CMOS processing is reaching the limits in device scaling and fabrication. Silicon-an-Insulator (Sal) technology provides an alternative. It not only allows better scalability but also a solution to low power and high performance applications for next generation CMOS devices. Fully depleted SOI transistors have emerged as one of the leading candidate for CMOS scaling. The possibility of using the back gate has sparked research activities in the field of novel non-classical SOI devices. In recent years, non-classical sal devices such as double, triple and quadruple multi-gate MOSFET have attracted vast interests in various research bodies and researchers.
URI: https://hdl.handle.net/10356/41403
DOI: 10.32657/10356/41403
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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