dc.contributor.authorJiang, Shan
dc.date.accessioned2010-07-02T06:14:57Z
dc.date.accessioned2017-07-23T08:33:03Z
dc.date.available2010-07-02T06:14:57Z
dc.date.available2017-07-23T08:33:03Z
dc.date.copyright2008en_US
dc.date.issued2008
dc.identifier.citationJiang, S. (2008). High speed low voltage low power embedded analog-to-digital converters for wideband transceivers. Doctoral thesis, Nanyang Technological University, Singapore.
dc.identifier.urihttp://hdl.handle.net/10356/41406
dc.description.abstractThe analog-to-digital converter (ADC) is one of the key building blocks in digital communication systems. In modern receiver designs, ADCs are usually fabricated on the same die with the digital baseband signal processing block for the dual-chip solution. This implementation takes into considerations of cost, flexibility and packaging. The combination of analog circuits and digital circuits in one die poses numerous challenges in ADC design due to the coupling of digital noise to analog circuits.en_US
dc.format.extent183 p.en_US
dc.language.isoenen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuitsen_US
dc.titleHigh speed low voltage low power embedded analog-to-digital converters for wideband transceiversen_US
dc.typeThesis
dc.contributor.researchCentre for Integrated Circuits and Systemsen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.contributor.supervisorDo Manh Anh (EEE)en_US
dc.description.degreeDOCTOR OF PHILOSOPHY (EEE)en_US


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