Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/41412
Title: Design and analysis of redundant binary booth multipliers
Authors: He, Ya Juan
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2008
Source: He, Y. J. (2008). Design and analysis of redundant binary booth multipliers. Doctoral thesis, Nanyang Technological University, Singapore.
Abstract: Multiplication is a fundamental operation in most arithmetic computing systems. Over the last few decades, Redundant Binary (RB) number has emerged as a key internal format to speed up the partial product accumulation of treestructured parallel multipliers due to its carry-free property and regularity in Very Large Scale Integrated (VLSI) implementation. In this thesis, the high performance energy-efficient multiplication operation has been investigated based on three key constituent components of the RB Booth multiplier architecture.
URI: https://hdl.handle.net/10356/41412
DOI: 10.32657/10356/41412
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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