Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/41809
Title: Design a low noise CMOS low voltage reference without the use of large value resistor
Authors: Ong, Ee Siang.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
Issue Date: 2008
Abstract: This report describes the design of temperature-independent voltage reference circuit for process having a low supply voltage. With the scaling of supply voltage, the threshold voltage don't scale proportionally thus conventional bandgap voltage reference circuit have to be replaced by the low supply bandgap voltage reference circuit. This report consists of three portions: (a) A comprehensive study on the existing conventional bandgap voltage reference circuit and low voltage bandgap voltage reference circuit. (b) Using these ideas a low-power, low voltage bandgap voltage reference circuit is designed using cadence's Composer. The reference voltage is simulated by cadence's Analog Artist (using SpectreS) to ensure the specifications are met. (c) Finally, the circuit is realised by cadence's Virtuoso Layout base on Process Rules and Design Rules provided. Mentor Graphic's Calibre is used to perform design rule check (DRC) and Layout-versus-Schematic check (LVS) on the layout before tape out. Chartered 0.18um CMOS process is used to design the bandgap voltage reference circuit. This circuit operated on 1.2V power supply voltage (for Typical Process): (a) Consumes a current of approximately 328.2uA can generate a reference voltage of approximately 0.62V. (b) Achieves a temperature coefficient of approximately 12 ppm/degree celsius at temperature range from -40°C to +80°C (c) Has an output noise approximately 600nV/sqrt(Hz).
URI: http://hdl.handle.net/10356/41809
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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