Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/4279| Title: | VLSI implementation of a parser for MPEG-2 systems program stream | Authors: | Ashwin Pai Ballambettu. | Keywords: | DRNTU::Engineering::Electrical and electronic engineering::Electronic systems DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems |
Issue Date: | 2005 | Abstract: | This report presents the VLSI design and implementation of a Parser for Program Stream of MPEG2 System Layer. The MPEG2 Program Stream Syntax, the Parser architecture, HDL implementation, simulation, synthesis and design timing analysis are discussed in detail. | URI: | http://hdl.handle.net/10356/4279 | Schools: | School of Electrical and Electronic Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
| Appears in Collections: | EEE Theses |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| EEE-THESES_33.pdf Restricted Access | 11.21 MB | Adobe PDF | View/Open |
Page view(s) 50
541
Updated on Mar 16, 2025
Download(s)
3
Updated on Mar 16, 2025
Google ScholarTM
Check
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.