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|Title:||Median filtering for image denoising with FPGA implementation||Authors:||Gong, Wei.||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Electronic systems::Signal processing||Issue Date:||2003||Abstract:||In this thesis, FPGA is chosen as the implementation platform based on an XSV-800 Virtex prototyping board from XESS Corporation. The focus of this thesis consists of three main parts: image acquisition, median filtering and image display, as well as two auxiliary parts.||URI:||http://hdl.handle.net/10356/4305||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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