Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/4325
Title: Electrical characterization of IC packages
Authors: Guruprasad B. G.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic packaging
Issue Date: 2003
Abstract: In this project, a PBGA package 3D lumped element model is developed and its parasitics are extracted using a FEM based solver. The package data is validated with a standard measurement procedure developed by JEDEC. This simulation methodology can be extended to other critical signals and packages, and the parasitics can be extracted.
URI: http://hdl.handle.net/10356/4325
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
EEE-THESES_370.pdf
  Restricted Access
1.93 MBAdobe PDFView/Open

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.