Electrical characterization and modeling on mechanical strength of copper to copper bonds for three dimensional integrated circuits
I Made Riko
Date of Issue2011
School of Materials Science and Engineering
Vertically stacking and bonding individual processed wafers with through-Si vias (TSV) to form three dimensional integrated circuits (3DIC) introduces the possibility of reducing signal propagation delay, a reduction in power consumption and heterogeneous device integration. Cu thermocompression bonding is seen as a general route to realize 3DIC, with bonded metals providing both mechanical adhesion as well as electrical interconnection. Mechanical testing to assess the bond quality of bonded processed wafers can be very costly, particularly on production wafers which have multilayer devices designed in the chips. A new non-destructive characterization method based on measured resonance frequency is proposed. Capacitive and resistive characteristics of the contact interface are amplified and utilized with a designed external circuit that consists of an inductor and a resistor. This new measurement technique shows an improvement in sensitivity as compared to contact resistance measurement, as well as eliminates stray resistance effect from line resistance and probing contact resistance. A 3D bonded Cu-Cu test structure that enables three methods of bond interface characterization, i.e. electrical contact resistance measurement, resonance-frequency characterization method and die shear test was designed and fabricated.
DRNTU::Engineering::Materials::Electronic packaging materials