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https://hdl.handle.net/10356/4396
Title: | Characterization of gate oxide degradation caused by electrical stress | Authors: | Huang, Jiayi. | Keywords: | DRNTU::Engineering::Electrical and electronic engineering::Microelectronics | Issue Date: | 2003 | Abstract: | In this thesis, the degradation of ultrathin gate oxide caused by electrical stress has been studied in detail. Interface trap generation and oxide charge trapping in the gate oxide are the two key issues for electrical stress-induced degradation. In this work, gate-controlled-diode (GCD) and direct-current current-voltage (DCIV) techniques have been used. | URI: | http://hdl.handle.net/10356/4396 | Schools: | School of Electrical and Electronic Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Theses |
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File | Description | Size | Format | |
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EEE-THESES_434.pdf Restricted Access | 1.98 MB | Adobe PDF | View/Open |
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