Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/4396
Title: Characterization of gate oxide degradation caused by electrical stress
Authors: Huang, Jiayi.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
Issue Date: 2003
Abstract: In this thesis, the degradation of ultrathin gate oxide caused by electrical stress has been studied in detail. Interface trap generation and oxide charge trapping in the gate oxide are the two key issues for electrical stress-induced degradation. In this work, gate-controlled-diode (GCD) and direct-current current-voltage (DCIV) techniques have been used.
URI: http://hdl.handle.net/10356/4396
Schools: School of Electrical and Electronic Engineering 
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
EEE-THESES_434.pdf
  Restricted Access
1.98 MBAdobe PDFView/Open

Page view(s) 50

480
Updated on May 7, 2025

Download(s)

4
Updated on May 7, 2025

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.