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https://hdl.handle.net/10356/4480
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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Aung Thura | en_US |
dc.date.accessioned | 2008-09-17T09:52:21Z | |
dc.date.available | 2008-09-17T09:52:21Z | |
dc.date.copyright | 2000 | en_US |
dc.date.issued | 2000 | |
dc.identifier.uri | http://hdl.handle.net/10356/4480 | |
dc.description.abstract | This project involves the analysis and design of 4-bit Magnitude Comparator. This chip is available commercially as SN5485, SN54L85, SN54LS85, SN54S85 or SN7485, SN74L85, SN74LS85, SN74S85. The Data sheet is obtained and attached in Appendix A. | en_US |
dc.rights | Nanyang Technological University | en_US |
dc.subject | DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits | |
dc.title | Analysis and design of 4-bit magnitude comparator | en_US |
dc.type | Thesis | en_US |
dc.contributor.supervisor | Liu, Po-Ching | en_US |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.description.degree | Master of Science (Consumer Electronics) | en_US |
item.fulltext | With Fulltext | - |
item.grantfulltext | restricted | - |
Appears in Collections: | EEE Theses |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
EEE-THESES_51.pdf Restricted Access | 17.54 MB | Adobe PDF | View/Open |
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