Please use this identifier to cite or link to this item:
|Title:||VLSI implementation of Reed Solomon encoder and decoder chip||Authors:||Lau, Luh Chyuan.||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits||Issue Date:||2005||Abstract:||This report represents the VLSI design implementation of the Reed Solomon Encoder and Decoder. The overall architecture, design, simulation and synthesis of the Reed Solomon Encoder and Decoder, as well as the internal modules are discussed in detail.||URI:||http://hdl.handle.net/10356/4561||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.