Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/46499
Title: 60GHz divider design
Authors: Tay, Wei Shi.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2011
Abstract: The opening up of the 57GHz - 64GHz un-channelized spectrum for license-free operation in 2001 prompted intensive effort in developing Radio Frequency integrated circuits and systems operating at the Giga-hertz range. Rapid evolution of the low-cost submicrometer CMOS process technology has aided in the development of more compact, lower power, higher speed and wider bandwidth millimeter-wave applications. Phase-locked loop circuits are extensively used in many communication applications and to keep pace with the rapid evolution in the communication industry, this project was intended to study the various high frequency divider topologies available. The emphasis of this project is to design a low power 60GHz frequency divider. Previous research and finding have strongly supported the feasibility of this project. A 60GHz Injection-locked frequency divider was design in TSMC 65nm CMOS process with locking range of 58.9 – 60.5 GHz and consumes 1.57mW power from a 0.8V supply.
URI: http://hdl.handle.net/10356/46499
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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