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|Title:||Design automation for a 2 uM double-metal CMOS gate array||Authors:||Chua, Hong Chuek.||Keywords:||DRNTU::Engineering::Mechanical engineering||Issue Date:||1992||Abstract:||The objective of this project is to develop an electronic design automation (EDA) package for the 2 \im CMOS base array which was previously designed by the joint effort of both staff and students of the School of EEE, NTU. The development work followed closely the requirements of the industry in ASIC design. The three design streams, A, B and C, have been developed and successfully implemented on the Mentor Graphics Workstation.||Description:||143 p.||URI:||http://hdl.handle.net/10356/46617||Rights:||Nanyang Technological University||Fulltext Permission:||restricted||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Research Reports (Staff & Graduate Students)|
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