dc.contributor.authorSun, Linaen_US
dc.date.accessioned2011-12-23T09:57:21Z
dc.date.accessioned2017-07-23T08:33:43Z
dc.date.available2011-12-23T09:57:21Z
dc.date.available2017-07-23T08:33:43Z
dc.date.copyright2009
dc.date.issued2009
dc.identifier.citationSun, L. (2009). Interface characterization of wafer bonding. Master’s thesis, Nanyang Technological University, Singapore.
dc.identifier.urihttp://hdl.handle.net/10356/46809
dc.description189 p.en_US
dc.description.abstractWafer bonding technology presents one way of fabricating power diode devices directly rather than in a semiconductor bulk. It provides an effective way with great potential for the power diode mass production. However, for practical applications of wafer bonding technique, it is important to determine the optimized process conditions to achieve good electrical performance.en_US
dc.rightsNanyang Technological Universityen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineeringen_US
dc.titleInterface characterization of wafer bondingen_US
dc.typeThesisen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.contributor.supervisorTan Cher Ming (EEE)en_US
dc.description.degreeMASTER OF ENGINEERING (EEE)en_US


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