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https://hdl.handle.net/10356/46924| Title: | Design of phase detector for PLL based clock and data recovery circuits | Authors: | Sawant Ketan Suresh. | Keywords: | DRNTU::Engineering::Electrical and electronic engineering | Issue Date: | 2011 | Abstract: | The volume of data over telecommunication network has put greater demands for faster communication channels to allow more data to be transferred in given time. Among all the communication medium optical transmission through optical fibers achieves highest bandwidth. Synchronous optical network (SONET) standard in North America and Synchronous Digital Hierarchy (SDH) standard in Europe are results of constant growth and development in optical communications. | Description: | 89 p. | URI: | http://hdl.handle.net/10356/46924 | Schools: | School of Electrical and Electronic Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
| Appears in Collections: | EEE Theses |
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| File | Description | Size | Format | |
|---|---|---|---|---|
| EEE_THESES_258.pdf Restricted Access | 9.31 MB | Adobe PDF | View/Open |
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