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https://hdl.handle.net/10356/46976
Title: | New design methodologies for low complexity fir filters and reconfigurable constant multipliers | Authors: | Chen, Jiajia | Keywords: | DRNTU::Engineering::Electrical and electronic engineering::Electronic systems | Issue Date: | 2010 | Source: | Chen, J. (2010). New design methodologies for low complexity fir filters and reconfigurable constant multipliers. Doctoral thesis, Nanyang Technological University, Singapore. | Abstract: | Multipliers, being the area and power hungry units, are deciding factors to the overall area, speed, and power consumption of digital circuits. To meet the stringent design requirements, multiplications have been avoided, reduced or replaced if possible by powerful design methodologies in high-level synthesis for many compute intensive digital signal processing problems. | Description: | 174 p. | URI: | https://hdl.handle.net/10356/46976 | DOI: | 10.32657/10356/46976 | Schools: | School of Electrical and Electronic Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | open | Fulltext Availability: | With Fulltext |
Appears in Collections: | EEE Theses |
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EEE_THESES_31.pdf | 24.05 MB | Adobe PDF | ![]() View/Open |
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