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|Title:||Design of a power efficient output stage for dc-to-dc converters||Authors:||Lao, Jiahong.||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Power electronics||Issue Date:||2010||Source:||Lao, J. (2010). Design of a power efficient output stage for dc-to-dc converters. Master’s thesis, Nanyang Technological University, Singapore.||Abstract:||This thesis describes the analysis and design of a power-efficient output stage for DC-to-DC buck converters based on low swing voltage and DCM mode. The theoretical aspect of this thesis pertains to the mathematical analysis of the power dissipation mechanism of a DC-to-DC converter output stage. The practical aspect pertains to the design and implementation of a DC-to-DC buck converter to achieve better power efficiency performance over the entire load current range, in particular at light load and extreme light load conditions.||Description:||115 p.||URI:||http://hdl.handle.net/10356/47033||Rights:||Nanyang Technological University||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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