Design of high-speed low-power clock and data recovery circuit
Date of Issue2006
School of Electrical and Electronic Engineering
In this thesis, the design of fully integrated high-speed low-power clock and data recovery (CDR) circuits in complementary metal-oxide-semiconductor (CMOS) devices for synchronous optical network (SONET) applications has been explored.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Nanyang Technological University