Please use this identifier to cite or link to this item:
Title: Study of carbon nanotube field effect transistor using electrostatic force microscopy
Authors: Ong, Hock Guan
Keywords: DRNTU::Engineering::Materials::Nanostructured materials
Issue Date: 2012
Source: Ong, H. G. (2012). Study of carbon nanotube field effect transistor using electrostatic force microscopy. Doctoral thesis, Nanyang Technological University, Singapore.
Abstract: As the silicon based metal-oxide-semiconductor field effect transistors quickly reaching the proposed 8 nm limit by 2022, it is necessary to search for solutions that can go beyond the 8 nm limit. One method is to substitute silicon with nanostrucutured materials. Carbon nanotube is a potential candidate because of its superior electrical, mechanical and chemical properties over silicon. Carbon nanotube field effect transistor has been studied extensively since 1998. However, there are still challenges before it can be implemented into commercial products. One of the issues is the existence of hysteresis in its transfer characteristic, which is undesirable for active logic device applications. On the other hand, it has been proposed that this hysteresis behavior can be explored for non-volatile memory application. Either way, it is crucial to understand the cause of the hysteresis, so that we can eliminate or stabilize it for different applications. In this work, we performed an in-depth study on how the hysteresis is generated in a single carbon nanotube field effect transistor by conducting in-situ electrostatic force microscopy study while the transport property is being measured. Using this technique, we have demonstrated that a layer of charges are injected from the carbon nanotube channel onto the gate dielectric, SiO2 in our device, surface. This layer of charges screens the applied gate voltage and causes the hysteresis in the transistor transfer characteristic. In addition, we have also investigated the dynamic injection and dissipation of the screening charges and the nature of the charge traps. It has been suggested previously that the traps for these injected charges could be (1) at the Si/SiO2 interface, (2) in the SiO2, (3) at the CNT/SiO2 interface and (4) surface containments. Using our setup, we have concluded that surface traps on SiO2, such as the water layer that is absorbed by the silanol groups on the SiO2 surface, is the dominating factor that causes hysteresis at room temperature. By investigating the dissipation characteristic of the injected charges, we have found that at elevated temperatures, the water layer starts to evaporate. Above a critical temperature, the silanol groups become the dominating traps. We have fitted the charge diffusion curves using Fick’s 2nd law of diffusion, and obtained the activation energies of ~0.46 eV and 0.91 eV below and above the critical temperature, respectively.
DOI: 10.32657/10356/48023
Fulltext Permission: open
Fulltext Availability: With Fulltext
Appears in Collections:MSE Theses

Files in This Item:
File Description SizeFormat 
TmseG0702491L.pdf2.55 MBAdobe PDFThumbnail

Page view(s) 50

Updated on May 7, 2021

Download(s) 20

Updated on May 7, 2021

Google ScholarTM




Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.