dc.contributor.authorNavin Michael
dc.date.accessioned2012-03-01T07:48:03Z
dc.date.accessioned2017-07-23T08:29:31Z
dc.date.available2012-03-01T07:48:03Z
dc.date.available2017-07-23T08:29:31Z
dc.date.copyright2012en_US
dc.date.issued2012
dc.identifier.citationNavin, M. (2012). Design of a low-power, reconfigurable digital front-end for a multimode SDR handset. Doctoral thesis, Nanyang Technological University, Singapore.
dc.identifier.urihttp://hdl.handle.net/10356/48073
dc.description.abstractEmerging communication paradigms like opportunistic spectrum access and wireless heterogeneous networks impose a high degree of flexibility on the underlying physical layer hardware of the mobile terminal. A software implementation of the radio baseband algorithms on an instruction set architecture (ISA) offers the highest degree of flexibility and hardware reusability, since the reconfiguration of the terminal for a new standard involves a mere change of software code. However the power efficiencies of ISAs have not scaled to the point where the entire baseband computations of a mobile handset can be performed in software. The computationally intensive signal processing tasks in the radio baseband have to be accelerated in hardware. Dedicated hardware (HW) accelerator cores have a power efficiency which is several orders higher than a software implementation and hence, have been extensively used for accelerating the computationally intensive tasks like channelization and decoding. HW accelerators, however, are inflexible in general and are optimized for a single specification. Incorporating flexibility necessarily incurs both an area and power penalty. The growing need for supporting multiple wireless standards with heterogeneous throughput and mobility requirements in a small form factor mobile handset with a limited silicon area requires the accelerator cores to be flexible and reusable in addition to being power efficient.en_US
dc.format.extent171 p.en_US
dc.language.isoenen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Wireless communication systemsen_US
dc.titleDesign of a low-power, reconfigurable digital front-end for a multimode SDR handseten_US
dc.typeThesis
dc.contributor.researchCentre for High Performance Embedded Systemsen_US
dc.contributor.schoolSchool of Computer Engineeringen_US
dc.contributor.supervisorVinod Achutavarrier Prasaden_US
dc.description.degreeDOCTOR OF PHILOSOPHY (SCE)en_US
dc.identifier.doihttps://doi.org/10.32657/10356/48073


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