Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/4863
Title: Translation of HDL circuit description to circuit netlist
Authors: Ma, Su Yamin
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2003
Abstract: For a top-down system design, Hardware Description Language (HDL) is often used for high-level specification and behaviour simulations. Whereas for a bottom-up circuit design, the circuit designer will normally be dealing with device models for circuit simulation.
URI: http://hdl.handle.net/10356/4863
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
EEE-THESES_855.pdf
  Restricted Access
13.83 MBAdobe PDFView/Open

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.