Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/4916
Title: VHDL implementation of random number generators
Authors: Myint Htwe.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Computer hardware, software and systems
Issue Date: 2000
Abstract: Random number generators are widely utilized in many electronic circuitries. It is therefore useful to develop standard library modules of reconfigurable random number generators to facilitate the IC design process. In this dissertation, random number generators have been developed based on the most popular language VHDL (Very high speed integrated circuits Hardware Description Language), and stored as library modules (LM). AHDL (Altera Hardware Description Language) was the preferred choice among the many HDL available due to its user-friendliness, easy accessibility and compatible features.
URI: http://hdl.handle.net/10356/4916
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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