Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/49575
Title: Design and implementation of a digital system of elementary function computation on FPGA device
Authors: Wu, Yujie.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic systems
Issue Date: 2012
Abstract: The integrated Add-Table lookup-Add (iATA) is a memory efficient algorithm for computing elementary functions. In the iATA method, an elementary function is implemented in tables and the outputs of the tables are then summed to obtain the value of the function. Xilinx 7-Series FPGA is used to implement the iATA system.
URI: http://hdl.handle.net/10356/49575
Schools: School of Electrical and Electronic Engineering 
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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