Investigation on the power consumption of ripple-carry adders

Abstract

Power consumption is a major factor in interpreted circuit. For digital circuits, power estimation is very important for multiple constant multiplier blocks. Current existed methods for power estimation such as Glitch Path Count and Glitch Path Score. These methods focus only on dynamic power only because dynamic power contributed nearly the whole power consumption compare to static power. But when technology become smaller and smaller, static power have increase and become as large as dynamic power. Therefore, methods such as Glitch Path Count and Glitch Path Score will not be accurate anymore and a new estimation method will be needed.