Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/4991
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dc.contributor.authorOng, Beng Hweeen
dc.date.accessioned2008-09-17T10:02:50Zen
dc.date.available2008-09-17T10:02:50Zen
dc.date.copyright2005en
dc.date.issued2005en
dc.identifier.citationOng, B. H. (2005). Characterization and modeling of on-chip interconnects for silicon RFIC design. Master’s thesis, Nanyang Technological University, Singapore.en
dc.identifier.urihttps://hdl.handle.net/10356/4991en
dc.description.abstractThe characterization and modelling of on-chip interconnects had been carried out in this project. First, an overview of the on-chip interconnect on lossy silicon-based process is presented. Second, on-wafer high frequency measurements of the on-chip interconnects are carried out and investigated in depth.en
dc.rightsNanyang Technological Universityen
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Integrated circuitsen
dc.titleCharacterization and modeling of on-chip interconnects for silicon RFIC designen
dc.typeThesisen
dc.contributor.supervisorYeo Kiat Sengen
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen
dc.description.degreeMASTER OF ENGINEERING (EEE)en
dc.contributor.supervisor2Ma Jian-Guoen
dc.identifier.doi10.32657/10356/4991en
item.grantfulltextopen-
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