dc.contributor.authorOng, Beng Hweeen_US
dc.date.accessioned2008-09-17T10:02:50Z
dc.date.accessioned2017-07-23T08:32:08Z
dc.date.available2008-09-17T10:02:50Z
dc.date.available2017-07-23T08:32:08Z
dc.date.copyright2005en_US
dc.date.issued2005
dc.identifier.citationOng, B. H. (2005). Characterization and modeling of on-chip interconnects for silicon RFIC design. Master’s thesis, Nanyang Technological University, Singapore.
dc.identifier.urihttp://hdl.handle.net/10356/4991
dc.description.abstractThe characterization and modelling of on-chip interconnects had been carried out in this project. First, an overview of the on-chip interconnect on lossy silicon-based process is presented. Second, on-wafer high frequency measurements of the on-chip interconnects are carried out and investigated in depth.en_US
dc.rightsNanyang Technological Universityen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
dc.titleCharacterization and modeling of on-chip interconnects for silicon RFIC designen_US
dc.typeThesisen_US
dc.contributor.supervisor2Ma Jian-Guo (EEE)en_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.contributor.supervisorYeo Kiat Seng (EEE)en_US
dc.description.degreeMASTER OF ENGINEERING (EEE)en_US


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