Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/4994
Title: Skew-tolerant dynamic logic circuits
Authors: Ong, Chi Boon.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2005
Abstract: This dissertation discusses the overhead of traditional domino logic that consumes a higher cycle time. It also discusses the objective of skew-tolerant circuit design that includes the static and domino circuits. The advantage of skew-tolerant design is to avoid solid edges in which the data must meet the setup time before a clock edge. Apart from this, skew-tolerant domino circuits also use multi-overlapping clocking to reduce latches and thus eliminating solid edges and minimize the sequencing overhead.
URI: http://hdl.handle.net/10356/4994
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

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