Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/49949
Title: Design and ASIC implementation of binary-to-residue converter
Authors: Kor, Tianyuan.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2012
Abstract: This project involves the design and synthesis of improved binary-to-residue converter, also known as the forward converter, which converts an integer number from Binary Number System (BNS) representation into Residue Number System (RNS) representation. Improvement to the design were made in the carry free additional stage, also known as the column compression stage or reduction stage, whereby counters are incorporated to perform the preliminary partial product bit accumulation before summation using adders. Additive inverse technique was also used in this stage. The proposed forward converter had implemented a Look-Up Table to facilitate compression by converting the higher partial bit product to residue value. Both residue and lower bit partial bit product will then pass thru a proposed modulus adder. This report discusses the entire application-specific integrated circuit implementation process, from RTL coding and function simulations of the proposed architecture to synthesis and timing verification of the design.
URI: http://hdl.handle.net/10356/49949
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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