Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/50174
Title: Development of a rapid prototyping of FPGA-based digital multiplier
Authors: Toh, Tong San.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Issue Date: 2012
Abstract: This report is devoted for the implemented of different kinds of multipliers on reconfigurable hardware FPGA using VHDL. The main focuses are on the speed, area of the multiplier and performance comparison. Hardware Multiplication is a basic function often required for system applications such as DSP and process control. Optimizing the speed and area of the multiplier is a major design issue and are usually conflicting constraints because improving speed results mostly in larger areas. This project aimed to determine the best solution by evaluating few multipliers using FPGA for rapid prototyping. This is important because the fabrication of chips and high performance system require components which are as small as possible and less power consumption.
URI: http://hdl.handle.net/10356/50174
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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