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https://hdl.handle.net/10356/5018
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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Palaniappan Annamalai | en_US |
dc.date.accessioned | 2008-09-17T10:03:23Z | |
dc.date.available | 2008-09-17T10:03:23Z | |
dc.date.copyright | 2004 | en_US |
dc.date.issued | 2004 | |
dc.identifier.uri | http://hdl.handle.net/10356/5018 | |
dc.description.abstract | The communications infrastructure that has become so much a part of daily life is expanding at an exponential rate. The advancement of network and storage technology has resulted increased usage and transportation of multimedia information which requires a high speed, high performance, flexible designs. Design of a customized base band signal processing and its implementation at silicon level is an achievable target these days using reconfigurable platforms. | en_US |
dc.rights | Nanyang Technological University | en_US |
dc.subject | DRNTU::Engineering::Electrical and electronic engineering::Electronic systems | |
dc.title | FPGA based signal processing for high data rate digital communications | en_US |
dc.type | Thesis | en_US |
dc.contributor.supervisor | Low, Kay Soon | en_US |
dc.contributor.school | School of Electrical and Electronic Engineering | en_US |
dc.description.degree | Master of Science (Computer Control and Automation) | en_US |
item.fulltext | With Fulltext | - |
item.grantfulltext | restricted | - |
Appears in Collections: | EEE Theses |
Files in This Item:
File | Description | Size | Format | |
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EEE-THESES_995.pdf Restricted Access | 17.71 MB | Adobe PDF | View/Open |
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