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|Title:||Effects of mechanical stress on the performance of metal-oxide-semiconductor transistors||Authors:||Yang, Peizhen||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Semiconductors||Issue Date:||2012||Source:||Yang, P. (2012). Effects of mechanical stress on the performance of metal-oxide-semiconductor transistors. Doctoral thesis, Nanyang Technological University, Singapore.||Abstract:||Stress engineering is widely used in the microelectronics industry to improve the on-current (Ion) performance of the metal-oxide-semiconductor (MOS) transistors through the strain-induced mobility enhancement. However, there are still debates regarding the relevance of the low-field mobility in the saturation drain current of the nanoscale MOS transistors. Based on velocity saturation model, the high-field velocity is independent of the low-field mobility. In the other words, velocity saturation model predicts that mobility enhancement techniques will not improve Ion of the nanoscale MOS transistors. Ballistic transport model considers an ideal situation where the channel carriers do not experience any scattering when they transit from the source to the drain. Since mobility is a concept that involves channel scattering, ballistic transport regards mobility as irrelevant in the nanoscale MOS transistors. In quasi-ballistic transport model, channel carriers will undergo a number of channel scatterings before reaching the drain. Hence, quasi-ballistic transport model is able to account for the strain-induced Ion improvement in nanoscale MOS transistors. However, the saturation drain current equation of a transistor in the quasi-ballistic model comprises parameters that are not properly defined. Furthermore, some researchers managed to use velocity saturation model to fit the saturation current of the nanoscale MOS transistor. By improvising Lundstrom’s 1997 theory on the quasiballistic transport and unifying the merits of existing transport models, we arrive at a simplified saturation drain current equation for nanoscale MOS transistors.||URI:||https://hdl.handle.net/10356/50306||DOI:||10.32657/10356/50306||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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Updated on Jun 23, 2021
Updated on Jun 23, 2021
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