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|Title:||Design, simulation and fabrication of silicon nanowire based nanoelectronics devices||Authors:||Sun, Yongshun.||Keywords:||DRNTU::Engineering::Electrical and electronic engineering::Microelectronics||Issue Date:||2012||Source:||Sun, Y. (2012). Design, simulation and fabrication of silicon nanowire based nanoelectronics devices. Doctoral thesis, Nanyang Technological University, Singapore.||Abstract:||Silicon nanowire (SiNW) has drawn great research attention in recent years due to its high aspect ratio and unique electrical properties, which arise from quantum confinement effects and changes in the wave function of charge carriers, density of states, effective mass and bandgap. It has the potential to become the building block of next generation electronics devices. SiNW fabricated using the top-down approach is advantageous compared to the bottom-up approach as the process is compatible with silicon CMOS process and can be integrated with conventional silicon devices. It also allows large scale integration and hence is attractive from the prospective of manufacturability. The objective of this work is to design, simulate, fabricate and characterize SiNW based nanoelectronics devices synthesized with the CMOS compatible top-down approach, where silicon fins are patterned with optical lithography and subsequently oxidized and reduced to form SiNWs. Three SiNW based devices have been investigated in this work, which are Schottky barrier diode, single-electron transistor and p-i-n junctions array.||URI:||http://hdl.handle.net/10356/50627||Fulltext Permission:||open||Fulltext Availability:||With Fulltext|
|Appears in Collections:||EEE Theses|
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