Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/50872
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dc.contributor.authorLin, Mengda.
dc.date.accessioned2012-12-07T07:49:24Z
dc.date.available2012-12-07T07:49:24Z
dc.date.copyright2012en_US
dc.date.issued2012
dc.identifier.urihttp://hdl.handle.net/10356/50872
dc.description.abstractCognitive radio (CR) has been proposed as a dynamic and adaptive spectrum sharing paradigm which will give opportunistic access of the vacant frequency bands to a group of users called cognitive radio users (secondary users) for whom the band has not been licensed. Fast and accurate spectrum sensing (spectrum detection) is important in CR to perform signal detection and spectral analysis with a low probability of interception (LPI). The spectrum sensor in a CR should be able to support different detection requirements such as sensing resolution (sensing resolution is defined as analysis resolution or step-size in frequency domain) and detection bandwidth (i.e. the total input bandwidth for detection) due to the wide variation of the input signal. Thus reconfigurability is one of the key requirements in the spectrum detector for CR. Conventional discrete Fourier transform (DFT) based filter bank spectrum detector is not an optimum solution for such scenarios due to its fixed uniform bandwidth and high power consumption. Dynamic sensing configuration of a DFT based filter bank spectrum detector for achieving different sensing resolutions will consume substantial hardware overhead. The design and realization of a spectrum detector that offers an efficient trade-off between area consumption, power consumption, and reconfigurability is highly significant in the current scenario. This thesis addresses the issue of incorporating low complexity and reconfigurability into the spectrum detector for CR receiver. Spectrum detectors based on two types of new filter banks are first proposed in this thesis. The proposed spectrum detectors perform spectrum sensing of wideband input signal with no priori spectrum knowledge. They have low complexity and high reconfigurability compared to conventional DFT filter bank spectrum detector while offering similar detection accuracy as that of the DFT filter bank based spectrum detector. The proposed filter banks, multi-stage coefficient decimation filter bank (MS-CDFB) and progressive decimation filter bank (PDFB), are constructed using coefficient decimation technique. The first contribution, MS-CDFB, provides reconfigurable subband splitting with low complexity. The subbands of the filter bank are obtained by performing coefficient decimation on the prototype filter with lower order masking filters to mask out the undesired subbands. The second contribution, PDFB, can be reconfigured by software to adjust to different detection requirements. In addition, PDFB can also be used to realize reconfigurable masking filters that are used in MS-CDFB. Design guidelines, complexity analysis, performance evaluations, and field programmable gate array (FPGA) realization are presented in this thesis.en_US
dc.format.extent168 p.en_US
dc.language.isoenen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Antennas, wave guides, microwaves, radar, radioen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Wireless communication systemsen_US
dc.titleDesign and realization of a reconfigurable low complexity spectrum detector for cognitive radiosen_US
dc.typeThesis
dc.contributor.supervisorVinod Achutavarrier Prasaden_US
dc.contributor.schoolSchool of Computer Engineeringen_US
dc.description.degreeDoctor of Philosophy (SCE)en_US
dc.contributor.researchCentre for High Performance Embedded Systemsen_US
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