Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/50912
Title: Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices
Authors: Niu, Chao.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Issue Date: 2012
Abstract: To study Non-volatile memory (NVM), we do research on several NVM devices. Study Topological Insulator and Race Track Memory, searching for a potentially better structure. Also study on spin transfer torque random access memory (stt-ram) and spin transfer torque magnetoresistive random access memory (stt-mram), comparing different structures of stt-mram with the help of simulation on NVMspice.
URI: http://hdl.handle.net/10356/50912
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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