A full-custom IC design flow

Abstract

With increasing system complexity and greater demand for better performance in modern

technology, it is important to study a complete full-custom IC design flow in Digital Systems

and to make use of the flow using Electronic Design Automation (EDA) to complete an IC

design process, from front-end circuit implementation/simulation to the Back-end layout.

In the first phase of the project, I have investigated and acquired the basic knowledge of the

current trend and techniques of a Full-Custom IC design flow in Digital Systems using both

Electronic Design Automation (EDA) tools and Very High-Speed Integrated Circuit

Hardware Description Language (VHDL) techniques.

At the second phase of the project, making use of the theories and skillset acquired via phase

one, an 8-bit Carry-Ripple Based Full-Adder Multiplier was proposed, designed and then

implemented by me using the EDA tools: FPGA Advantage for VHDL Coding, ModelSIM

Simulation Suite for Simulation and Testing, Leonardo Spectrum for Synthesizing and

assembling the end product via the standard flow of a Full-Custom IC Design in Digital

Systems.

On the third phase of the project, to further improve the performance of the Multiplier in

terms of Speed and Circuit Area, a Carry-Save Based Full-Adder Architecture was proposed

to replace the Carry-Ripple Based Full-Adder of the Multiplier implemented earlier. Also by

making use of the versatility and flexibility of VHDL Coding, the Multiplier implemented

was modified to become an N x N Multiplier whereby N can be any positive Integer.