Please use this identifier to cite or link to this item:
https://hdl.handle.net/10356/5303
Title: | Board level bend test and viscoelastic warpage study of IC packages | Authors: | Toh, Siew Khim. | Keywords: | DRNTU::Engineering::Manufacturing | Issue Date: | 2003 | Abstract: | This project aimed to address two main concerns in the production of electronics packages. These include the packages' warpage performance after the assembly processes and board level solder joints' reliability during their service life. | URI: | http://hdl.handle.net/10356/5303 | Schools: | School of Mechanical and Production Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | MAE Theses |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
MAE-THESES_1052.pdf Restricted Access | 12.88 MB | Adobe PDF | View/Open |
Page view(s) 50
504
Updated on May 7, 2025
Download(s)
8
Updated on May 7, 2025
Google ScholarTM
Check
Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.