Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/5303
Title: Board level bend test and viscoelastic warpage study of IC packages
Authors: Toh, Siew Khim.
Keywords: DRNTU::Engineering::Manufacturing
Issue Date: 2003
Abstract: This project aimed to address two main concerns in the production of electronics packages. These include the packages' warpage performance after the assembly processes and board level solder joints' reliability during their service life.
URI: http://hdl.handle.net/10356/5303
Schools: School of Mechanical and Production Engineering 
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:MAE Theses

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