Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/54432
Title: Low dropout linear voltage regulator
Authors: Tan, Max Chuan Hung.
Keywords: DRNTU::Engineering
Issue Date: 2013
Abstract: Low Dropout Linear Voltage Regulator (LDOs) has been prevalent among battery-powered gadgets such as the cellular phones, computers and a variety of electronic devices. LDOs has been very well-liked and widely used in low-powered contrivance for the reason that it has efficient voltage regulating capabilities which enhances a prolong battery proficiency and longevity. LDOs can be classified as either high power or low power. In this project, the LDO is designed to be low power, delivering a maximum output current of less than 50μA. In this project a linear controller, optimized for the design of a low dropout, linear regulation is to be designed. The power supply voltage is kept as low as 1 V using a 0.18μm technology and expected to perform within the operating temperature range of 0˚C to 80 ˚C along with other specifications. The linear controller also known as series regulators, linearly regulate the conductance of the series pass switch connected between an input dc supply and the regulated output voltage. Since the flow of current and its control is continuous in time, the circuit is analog and linear in nature. Thus, the output voltage cannot exceed its input supply. The drop-out voltage is well-defined as the amount of voltage at the input/output differential stage whereby the control loop is not regulating. The design of the pass transistor's dropout voltage is expected to be lesser than 0.5 V. The design contains a high gain error amplifier, an output driver and a precision reference together as a closed loop system. Instead of using a NPN regulator, a PNP pass transistor is selected as it requires only a low input voltage to control its output voltage. In this way, the output impedance will be kept low to attain decent performance from the LDOs. A comprehensive description of the theories, calculations, concept behind the circuit design, findings and setback of the various design phases will be further elaborated in this report. Additional implementation will be discussed also to supplement the project.
URI: http://hdl.handle.net/10356/54432
Schools: School of Electrical and Electronic Engineering 
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Student Reports (FYP/IA/PA/PI)

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