Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/54598
Title: Digital breakdown and switching behaviours in high-K dielectrics in nano-scale mosfets
Authors: Liu, Wenhu.
Keywords: DRNTU::Engineering::Electrical and electronic engineering::Microelectronics
Issue Date: 2013
Abstract: It has been reported that the breakdown (BD) mode in ultra-thin gate dielectrics exhibits progressive BD after soft BD (SBD) instead of abrupt hard BD (HBD) commonly observed in thick dielectrics. Furthermore, the first SBD event in ultra-thin dielectrics does not necessarily lead to complete device or circuit malfunction, and the post-BD leakage level is a crucial factor on device functionality after BD. There is certain residual time between the occurrence of the first SBD and the device failure and this is called the progressive BD, which provides significantly prolonged lifetime in the post-BD regime. The device lifetime projections without consideration of post-BD reliability are considered to be extremely pessimistic. Thus, the post-BD leakage study is important for a better understanding of the post-BD reliability and a more accurate lifetime assessment. The progressive BD in SiON dielectrics was reported to consist of two distinct stages: the digital BD (Di-BD) and the analog BD (An-BD). The Di-BD is the early stage, characterized by the digital-like fluctuation of the gate leakage current (Ig), without significant net increase. The An-BD is the later stage, where Ig increases steadily with time before it goes into catastrophic BD that results in total malfunction. The existence of Di-BD in the ultra-thin high-κ dielectrics with tolerable leakage level is important for the post-BD reliability study in advanced nanoscale MOSFETs. In this work, the presence of the Di-BD stage in high-κ dielectrics is confirmed based on the study of post-BD Ig of various high-κ gate stacks. Moreover, as the random telegraph noise (RTN) becomes a concern for nano-scale MOSFETs’ performance stability, the post-BD Ig RTN signal at the Di-BD stage is studied at a low gate voltage (Vg) range in the vicinity of the operation voltage (Vop). Both time and frequency domain analyses suggest that the RTN signal can be detected only above a certain triggering voltage (Vtrig), and the value of Vtrig decreases with increasing dielectric degradation. For a 2 nm thick HfLaO dielectrics with a 0.5 µA post-BD leakage, the Vtrig was determined to be around 1.1 V which is above the Vop of ~1 V, indicating that the RTN fluctuation may not be as severe as expected to cause instability problem at the normal operating condition in degraded dielectrics. A recovery in the post-BD Ig under certain favorable conditions has been observed in NiSi FUSI (fully-silicided) gated stack MOSFETs with SiON or HfSiON dielectrics. The conductive BD path can be “switched-off” if a reverse bias, as opposed to the stressing voltage, is applied - a condition required for observing RESET conduction in bipolar resistive switching material systems. MOSFETs regain their working characteristics with insignificant degradation by this way even after experiencing severe BD-induced malfunction. Using the percolation model of gate dielectrics BD, we explain this switching behavior as a result of passivation of oxygen-deficient BD path. First, ionized oxygen atoms are removed from the BD path upon BD, and are driven by E-field and “stored” in the NiSi gate. Then, upon applying a reverse gate bias, they are driven back to the nanoscale BD path. Due to the presence of Joule heating in the highly resistive BD path, they rebond/passivate the Si dangling bonds in the oxygen-deficient BD path. The physical analyses of recovered MOSFETs suffering BD support this model. This means that BD transistors can be “repaired” electrically by a reverse voltage, introducing a significant impact on the conventional device lifetime projection. Employing the study on the switching behaviors in the post-BD Ig, moderate reverse bias is applied intentionally on the gate terminals of MOSFETs with degraded high-κ dielectrics (HfSiON and HfLaO) in SBD. The post-BD Ig is found to be effectively reduced by the recovery induced by reversed gate bias, where Ig-RTN and threshold voltage variation (ΔVT) are also reduced significantly or even disappear. The reduction in Ig, RTN and ΔVT in degraded gate dielectrics is modeled by oxygen ions re-passivation of dielectric traps through a gate bias bipolar switching. Bipolar switching-induced recovery also increases Vtrig significantly, thus the instability problem caused by RTN arises only at higher Vg after recovery. This gives some additional safety margin for circuit reliability, as it is possible that Vtrig is much higher above Vop after bipolar switching. Based on this finding, a performance boosting technique for transistors during operation is proposed, in which the gate terminal is swept by a small reverse voltage to induce bipolar switching and thus boost up the performance after long duration of operation. The oxygen passivation in BD path to model the recovery and switching in post-BD Ig is supported by further electrical characterizations with forming gas anneal (FGA) treatments. In MOSFETs with HfLaO dielectrics, the FGA passivation of BD path by H2 demonstrates very similar effect to the bipolar switching-induced recovery, where VT shift and Ig-RTN are significantly recovered. Monte Carlo simulation on Ig, in which traps inside HfO2 dielectrics are generated to simulate BD and partially passivated to simulate recovery, reproduces the experimental characteristics of Ig and Ig-RTN, supporting the oxygen passivation model. The RTN analysis confirms the trap-assisted-tunneling as the conduction mechanism after BD and also after the recovery induced by either bipolar switching or FGA. In addition, the correlated RTN in Ig and Id suggests that the traps responsible for the VT shift observed along with switching behavior in post-BD Ig are located in the localized conductive filament at the BD spot.
URI: http://hdl.handle.net/10356/54598
Schools: School of Electrical and Electronic Engineering 
Research Centres: Microelectronics Centre 
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:EEE Theses

Files in This Item:
File Description SizeFormat 
TeG0802676L.pdf
  Restricted Access
Thesis9.57 MBAdobe PDFView/Open

Page view(s) 50

572
Updated on Mar 27, 2024

Download(s) 50

21
Updated on Mar 27, 2024

Google ScholarTM

Check

Items in DR-NTU are protected by copyright, with all rights reserved, unless otherwise indicated.