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https://hdl.handle.net/10356/5476
Title: | Development of a failure assessment methodology for flip chip electronic assembly | Authors: | Yeo, Alfred Swain Hong. | Keywords: | DRNTU::Engineering::Manufacturing | Issue Date: | 2004 | Abstract: | In this project, two different solder bump materials are evaluated, they are lead-based 63Sn/37Pb solder and lead-free 96.5Sn/3.5Ag solder. Their solder joint fatigue lives on flip chip on board (FCOB) assembly are assessed by experimental testing and numerical modeling. FCOB assemblies are subjected to a temperature cycle test profile of -40/125°C. Failure analysis is performed to determine the failure mode and failure location. From the flip chip solder joint fatigue data, a two-parameter Weibull analysis is used to derive the mean time to failure (MTTF). Non-linear FE analysis is used to simulate the flip chip solder joint reliability under the temperature cycling loading condition, based on four different solder constitutive models, such as elastic-plastic, elastic-creep, elastic-plastic-creep and viscoplastic analyses. | URI: | http://hdl.handle.net/10356/5476 | Schools: | School of Mechanical and Production Engineering | Rights: | Nanyang Technological University | Fulltext Permission: | restricted | Fulltext Availability: | With Fulltext |
Appears in Collections: | MAE Theses |
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File | Description | Size | Format | |
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MAE-THESES_1208.pdf Restricted Access | 12.05 MB | Adobe PDF | View/Open |
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