Please use this identifier to cite or link to this item: https://hdl.handle.net/10356/59032
Title: Efficient FPGA realization of inner-products of variable vectors
Authors: Yan, Yi
Keywords: DRNTU::Engineering::Computer science and engineering
Issue Date: 2014
Abstract: An Inner product is a generalization of the dot product (also called Scalar product). It is a method to multiply vectors together. After which, it produce a scalar result. Nonetheless inner product is different with dot product, where dot product can be denoted into either algebraically or geometrically ways, while inner product is an operation that takes two equal-length array number and return a single algebraic number. Since inner product is a very important concept for researches, so there is a significant meaning to familiarize with its principle, find out the advantages and disadvantages of inner product, compare the differences between inner product and other arithmetic method, and improvement on the operation efficiency of inner product. In this report, the author has introduced the concepts of inner-product and the proposed design for inner-product of variable vectors, also analyzed and compared several different methods to improve the efficiency of the proposed DA (Distributed arithmetic)-based implementation of inner-product of variable vectors. Pipelining is one of the basic technologies to improve the data arrival time for implementation of inner-product. Reuse of on small N-point inner-product to compute larger inner product length will extremely decrease the data arrival time which will economize the whole time consumption of the real system. However, this method will increase the usage of LUTs (lookup tables) and Register slices. DA (Distributed arithmetic) has been widely used for implementation of inner-products, and the proposed design introduced in this report is a novel time efficient flexible solution for bit-parallel DA-based implementation of inner-product of variable vectors. From the analytical results in this report, it is shown that proposed structures for input word-lengths L = 8 and L = 16, respectively are nearly 5.4% and 36% faster than the reference design (conventional multiplier-based implementation) in average for different inner-product length (N = 8, 16, 32 and 64). Whereas, the number of devices utilization of proposed DA-based design are significant larger than the reference multiplier-based design.
URI: http://hdl.handle.net/10356/59032
Rights: Nanyang Technological University
Fulltext Permission: restricted
Fulltext Availability: With Fulltext
Appears in Collections:SCSE Student Reports (FYP/IA/PA/PI)

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There are many ways to optimize the computation of inner-product when one of the vectors is fixed. But not much study has been done on design of efficient architectures for FPGA realization of inner-products of variable vectors. The aim of the this project is to handle that issue. The student will work to develop a more efficient FPGA realization of inner-products of variable vectors.3.57 MBAdobe PDFView/Open

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