dc.contributor.authorLiu, Lei
dc.date.accessioned2014-09-12T02:14:58Z
dc.date.accessioned2017-07-23T08:35:28Z
dc.date.available2014-09-12T02:14:58Z
dc.date.available2017-07-23T08:35:28Z
dc.date.copyright2014en_US
dc.date.issued2014
dc.identifier.citationLiu, L. (2014). Implantable neural recording interface IC for motor prosthesis. Doctoral thesis, Nanyang Technological University, Singapore.
dc.identifier.urihttp://hdl.handle.net/10356/61742
dc.description.abstractParalysis has impacted the lives of millions of people, limiting not just their movement and quality of lives but also their mental health. Cortical neural prosthetics is a possible way to cure and if not help these paralyzed patients—by capturing patients’ thought straight from their brain, then processing the information and translating them to electronic control signals to the assistive technologies such as computer interfaces, robotic arms and nerve stimulators. By using these implantable microelectromechanical system (MEMS) electrode arrays that are implanted into the brain, researchers are able to watch the simultaneous activities of many neurons, to understand and appreciate the brain functions. The immediate mission of this research is hence to record neural signals from the human brain, not just adequately but appropriately. In the design of neural recording interface, the neural amplifier must have an input-referred noise that is low enough to detect the weak neural signals, and the power dissipation needs to be ultra-low to avoid tissue damage. Thus, the trade-off between noise and power becomes very important. A noise efficiency factor (NEF) is used to evaluate this trade-off and a lower NEF means better noise-power trade-off. Based on the proposed noise reduction technique, the low noise front-end amplifier developed in this design is able to achieve less than 4 µVrms noise with about 1 µW power consumption over a 5-kHz signal bandwidth. The NEF of the front-end amplifiers developed ranges from 2.2 to 3.6, which are among the lowest reported to-date. Balanced MOS-bipolar active pseudo-resistor structure has been adopted in the neural recording amplifiers to realize the ultra-low high-pass cutoff frequency and good signal linearity. For chronic neural recording, the impedance of the implanted electrode interface with the tissue will increase with time, which must be considered during neural recording amplifier design because the amplifier interfaces directly with the electrode. To further enhance the recording quality of the neural amplifier, another impedance-boosting neural amplifier is developed to boost the input impedance of the amplifier by ten times, which greatly removes the interference arise from the electrode mismatch. The signal to noise ratio does not degrade much even with long term neural recording, and the reliability of the neural recording system is demonstrated to be better than the classic design represented by Harrison’s work. Multi-channel recording is essential because a good amount of useful information can be simultaneously recorded from a large population of neuronal cells and their networks to enable more robust and sophisticated control of prosthetic devices. A 100-channel neural recording interface integrated circuit (IC) is fabricated and verified through hardware measurements. To further reduce the overall power consumption of the neural implant, a neural recording interface IC intended for simultaneous neural recording with action potential (AP) detection for data compression in wireless multichannel neural implants is presented. The proposed neural recording interface IC detects the neural spikes and sends only the preserved AP information for wireless transmission in order to reduce the overall power consumption. Wireless transmission of the recorded neural signal waveform is enabled only during the presence of neural spikes, and hence, the data rate can be effectively reduced by more than ten times when compared to the conventional wireless neural recording system. Furthermore, the complete neural AP information can be securely preserved with adaptive AP recording windows.en_US
dc.format.extent160 p.en_US
dc.language.isoenen_US
dc.subjectDRNTU::Engineering::Electrical and electronic engineering::Electronic circuitsen_US
dc.titleImplantable neural recording interface IC for motor prosthesisen_US
dc.typeThesis
dc.contributor.researchCentre for Integrated Circuits and Systemsen_US
dc.contributor.schoolSchool of Electrical and Electronic Engineeringen_US
dc.contributor.supervisorJe Minkyu
dc.contributor.supervisorGoh Wang Lingen_US
dc.description.degreeDOCTOR OF PHILOSOPHY (EEE)en_US
dc.contributor.organizationIME, Astaren_US


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