Class D amplifier with pseudo-randomized carrier frequency modulation (PRCFM) for EMI mitigation
Date of Issue2015
School of Electrical and Electronic Engineering
Class D amplifiers are found in nearly all portable electronic products for their small size and power efficiency. Due to their high frequency switching operation, they generate significant amount of electromagnetic interference (EMI) and usually off-chip filters are necessary in order for them to comply with the international regulatory EMI limits. With the continuous trend of product miniaturization, filter-less Class D amplifiers are gaining attention recently. Without the off-chip filter, designing a fully integrated filter-less Class D amplifier to meet the EMI requirements can be challenging. This thesis develops and implements a pseudo-randomized carrier frequency modulation (PRCFM) technique in both analog and digital filterless Class D audio power amplifiers for EMI mitigation purposes so that these amplifiers fulfill the electromagnetic compatibility (EMC) requirement without the needs of off-chip filters. The PRCFM circuit is implemented with a frequency divider and a linear feedback shift register (LFSR). The proposed amplifier also features a peak detector to improve the power conversion efficiency when it operates under low audio input condition. An analog filter-less Class D amplifier is designed and fabricated using 0.18 µm CMOS process technology with a size of 1 mm2 and the proposed PRCFM circuit occupies only less than 1% of the total chip area. The effectiveness of the PRCFM scheme for EMI mitigation is demonstrated experimentally. The PRCFM circuit consumes very little additional power and therefore has little impact on the power efficiency of the amplifier. In addition, the amplifier still maintains excellent total harmonic distortion (THD) over the audio band of interest (100 Hz - 6 kHz) and the typical modulation index range. With the encouraging results, the PRCFM technique is further extended to a digital Class D amplifier and similar EMI mitigation performance has also been demonstrated. The digital Class D amplifier consists of a digital pulse width modulation (DPWM) circuit, a power stage, a PRCFM circuit and a low pass filter (LPF). Moreover, an efficient algorithmic sampling process and a hybrid pulse generation method are proposed to improve THD performance. The circuit is first simulated in Matlab Simulink and then implemented with field-programmable gate array (FPGA). Both simulated and measured results have shown that the PRCFM spreads the switching frequency of the Class D amplifier from 145 kHz to 295 kHz in 31 frequency steps using a pseudo-random (PR) pattern, which results in EMI reduction of 7.4 dB, with acceptable THD.
DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits